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LM2578AM Folha de dados(PDF) 3 Page - Texas Instruments

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Nome de Peças LM2578AM
Descrição Electrónicos  Switching Regulator
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

LM2578AM Folha de dados(HTML) 3 Page - Texas Instruments

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LM2578A, LM3578A
www.ti.com
SNVS767E – AUGUST 2000 – REVISED APRIL 2013
Electrical Characteristics
These specifications apply for 2V
≤ VIN ≤ 40V (2.2V ≤ VIN ≤ 40V for TJ ≤ −25°C), timing capacitor CT = 3900 pF, and 25% ≤
duty cycle
≤ 75%, unless otherwise specified. Values in standard typeface are for TJ = 25°C; values in boldface type apply
for operation over the specified operating junction temperature range.
Typical(1)
LM2578A/
Symbol
Parameter
Conditions
LM3578A
Units
Limit (2)
OSCILLATOR
fOSC
Frequency
20
kHz
24
kHz (max)
16
kHz (min)
ΔfOSC/ΔT
Frequency Drift with Temperature
−0.13
%/°C
Amplitude
550
mVp-p
REFERENCE/COMPARATOR(3)
VR
Input Reference
I1 = I2 = 0 mA and
1.0
V
Voltage
I1 = I2 = 1 mA ±1%
(4)
1.050/1.070
V (max)
0.950/0.930
V (min)
ΔVR/ΔVIN
Input Reference Voltage Line
I1 = I2 = 0 mA and
0.003
%/V
Regulation
I1 = I2 = 1 mA ±1%
(4)
0.01/0.02
%/V (max)
IINV
Inverting Input Current
I1 = I2 = 0 mA, duty cycle = 25%
0.5
μA
Level Shift Accuracy
Level Shift Current = 1 mA
1.0
%
10/13
% (max)
ΔVR/Δt
Input Reference Voltage Long Term
100
ppm/1000h
Stability
OUTPUT
VC (sat)
Collector Saturation Voltage
IC = 750 mA pulsed, Emitter
0.7
V
grounded
0.90/1.2
V (max)
VE (sat)
Emitter Saturation Voltage
IO = 80 mA pulsed,
1.4
V
VIN = VC = 40V
1.7/2.0
V (max)
ICES
Collector Leakage Current
VIN = VCE = 40V, Emitter grounded,
0.1
μA
Output OFF
200/250
μA (max)
BVCEO(SUS)
Collector-Emitter Sustaining Voltage
ISUST = 0.2A (pulsed), VIN = 0
60
V
50
V (min)
CURRENT LIMIT
VCL
Sense Voltage Shutdown Level
Referred to VIN or Ground
110
mV
See (5)
80
mV (min)
160
mV (max)
ΔVCL/ΔT
Sense Voltage Temperature Drift
0.3
%/°C
ICL
Sense Bias Current
Referred to VIN
4.0
μA
Referred to ground
0.4
μA
(1)
Typical values are for TJ = 25°C and represent the most likely parametric norm.
(2)
All limits specified at room temperature (standard type face) and at temperature extremes (bold type face). Room temperature limits are
100% production tested. Limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate AOQL.
(3)
Input terminals are protected from accidental shorts to ground but if external voltages higher than the reference voltage are applied,
excessive current will flow and should be limited to less than 5 mA.
(4)
I1 and I2 are the external sink currents at the inputs (refer to Test Circuit).
(5)
Connection of a 10 k
Ω resistor from pin 1 to pin 4 will drive the duty cycle to its maximum, typically 90%. Applying the minimum Current
Limit Sense Voltage to pin 7 will not reduce the duty cycle to less than 50%. Applying the maximum Current Limit Sense Voltage to pin 7
is certain to reduce the duty cycle below 50%. Increasing this voltage by 15 mV may be required to reduce the duty cycle to 0%, when
the Collector output swing is 40V or greater (see Ground-Referred Current Limit Sense Voltage typical curve).
Copyright © 2000–2013, Texas Instruments Incorporated
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