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SN74AUP1G32DBVT Folha de dados(PDF) 10 Page - Texas Instruments

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Nome de Peças SN74AUP1G32DBVT
Descrição Electrónicos  Low-Power Single 2-Input Positive-OR Gate
Download  35 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

SN74AUP1G32DBVT Folha de dados(HTML) 10 Page - Texas Instruments

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SN74AUP1G32
SCES580I – JUNE 2004 – REVISED JUNE 2014
www.ti.com
9 Detailed Description
9.1 Overview
This single 2-input positive-OR gate that operates from 0.8 V to 3.6 V and performs the Boolean function
in positive logic.
The AUP family of devices has quiescent power consumption less than 1 µA and comes in the ultra small DPW
package. The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square
footprint saves significant board space over other package options while still retaining the traditional
manufacturing friendly lead pitch of 0.5 mm.
9.2 Functional Block Diagram
9.3 Feature Description
Wide operating VCC range of 0.8 V to 3.6 V
3.6-V I/O tolerant to support down translation
Input hysteresis allows slow input transition and better switching noise immunity at the input
Ioff feature allows voltages on the inputs and outputs when VCC is 0 V
Low noise due to slower edge rates
9.4 Device Functional Modes
Table 1. Function Table
INPUTS
OUTPUT
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L
L
L
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H
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H
H
H
10
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