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SN74CBT3305CDR Folha de dados(PDF) 1 Page - Texas Instruments |
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SN74CBT3305CDR Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 16 page www.ti.com FEATURES D, DGK, OR PW PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 1OE 1A 1B GND VCC 2OE 2B 2A DESCRIPTION/ORDERING INFORMATION SN74CBT3305C DUAL FET BUS SWITCH 5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION SCDS125B – SEPTEMBER 2003 – REVISED AUGUST 2005 • Undershoot Protection for OFF Isolation on A • Control Inputs Can Be Driven by TTL or and B Ports up to –2 V 5-V/3.3-V CMOS Outputs • Bidirectional Data Flow With Near-Zero • I off Supports Partial-Power-Down Mode Propagation Delay Operation • Low ON-State Resistance (r on) Characteristics • Latch-Up Performance Exceeds 100 mA Per (r on = 3 Ω Typ) JESD 78, ClassII • Low Input/Output Capacitance Minimizes • ESD Performance Tested Per JESD 22 Loading and Signal Distortion – 2000-V Human-Body Model (C io(OFF) = 5 pF Typ) (A114-B, Class II) • Data and Control Inputs Provide Undershoot – 1000-V Charged-Device Model (C101) Clamp Diodes • Supports Both Digital and Analog • Low Power Consumption Applications: USB Interface, Bus Isolation, (I CC = 3 µA Max) Low-Distortion Signal Gating • V CC Operating Range From 4 V to 5.5 V xxx xxx • Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) The SN74CBT3305C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active undershoot-protection circuitry on the A and B ports of the device provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The SN74CBT3305C is organized as two 1-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus switch is ON, and the A port is conncected to the B port, allowing bidirectional data flow between ports. When OE is low, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B ports. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74CBT3305CD SOIC – D CU305C Tape and reel SN74CBT3305CDR –40 °C to 85°C VSSOP – DGK Tape and reel SN74CBT3305CDGKR SNR Tube SN74CBT3305CPW TSSOP – PW CU305C Tape and reel SN74CBT3305CPWR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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Descrição semelhante - SN74CBT3305CDR |
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