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TPD3S716-Q1 Folha de dados(PDF) 5 Page - Texas Instruments |
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TPD3S716-Q1 Folha de dados(HTML) 5 Page - Texas Instruments |
5 / 32 page 5 TPD3S716-Q1 www.ti.com SLVSDH9C – MARCH 2016 – REVISED JUNE 2016 Product Folder Links: TPD3S716-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT (1) Depending on your IBUS current level, maximum operating junction temperature derating may be required. For IBUS > 1.5A, care should be taken in the PCB design to improve the board's thermal coefficient. Please see both the Power Dissipation and Junction Temperature and Layout Optimized for Thermal Performance sections for more details. (2) See the Figure 22 for configuration details. IBUS Current through VBUS switch (1) 2.4 A VEN, DEN Voltage range for enable 0 5.9 V CSYS Input capacitance(2) VBUS_SYS pin 100 µF CLOAD Output load capacitance(2) VBUS_CON pin 1 µF CVIN VIN capacitance (2) VIN pin 1 µF RADJ Resistance of RADJ resistor (2) IADJ pin 57 k Ω (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.6 Thermal Information THERMAL METRIC(1) TPD3S716-Q1 UNIT DBQ (SSOP) 16 PINS θJA Junction-to-ambient thermal resistance 98.8 °C/W θJCtop Junction-to-case (top) thermal resistance 48.0 °C/W θJB Junction-to-board thermal resistance 41.6 °C/W ψJT Junction-to-top characterization parameter 8.5 °C/W ψJB Junction-to-board characterization parameter 41.2 °C/W θJCbot Junction-to-case (bottom) thermal resistance N/A °C/W θJA(Custom) See the Layout Optimized for Thermal Performance section 57.0 °C/W 6.7 Electrical Characteristics over operating free-air temperature range, VEN = 0 V, DEN = 0 V, VBUS_SYS = 5 V, VIN = 3.3 V, VD+/VD–/D+/D–/VBUS_CON = float (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT CONSUMPTION IVBUS_SLEEP VBUS Sleep current consumption Measured at VBUS_SYS pin, VEN = 5 V, DEN = 5 V 45 150 µA IVBUS VBUS Operating current consumption Measured at VBUS_SYS pin 285 380 µA IVIN Leakage current for VIN Measured at VIN pin, VIN = 3.6 V 12 20 µA ION(LEAK) Leakage into VBUS_SYS while shorted to battery and powered on Measured flowing into VBUS_SYS pin, VBUS_SYS = 5 V, VBUS_CON = 18 V 225 300 µA IOFF(LEAK) Leakage through VBUS path while shorted to battery and unpowered Measured flowing out of VBUS_SYS pin, VBUS_SYS = 0 V, VBUS_CON = 18 V 50 µA ID(OFF_LEAK) Leakage out of data path while shorted to battery and unpowered Measured flowing out of D+ or D– pins, VBUS_SYS = 0 V, VD+ or VD– = 18 V, VIN = 0 V, D+/D– = 0 V –1 1 µA ID(ON_LEAK) Leakage out of data path while shorted to battery and powered on Measured flowing out of D+ or D– pins, VBUS_SYS = 5 V, VD+ or VD– = 18 V, VIN = 3.3 V, D+/D– = 0 V –1 1 µA IVD(OFF_LEAK) Leakage into data path while shorted to battery and unpowered Measured flowing in to VD+ or VD– pins, VBUS_SYS = 0 V, VD+ or VD– = 18 V, VIN = 0 V, D+/D– = 0 V 85 µA IVD(ON_LEAK) Leakage into data path while shorted to battery and powered on Measured flowing in to VD+ or VD– pins, VBUS_SYS = 5 V, VD+ or VD– = 18 V, VIN = 3.3 V D+/D– = 0 V 85 µA VIN PIN VUVLO(RISING) Undervoltage lockout rising for VIN VIN Ramp VIN up until VBUS and Data FETs turn on, VEN =0 V, DEN = 0 V 2.6 2.7 2.9 V VUVLO(FALLING) Undervoltage lockout falling for VIN Ramp VIN down until VBUS and Data FETs turn off, VEN =0 V, DEN = 0 V 2.5 2.6 2.8 VEN, DEN, FLT PINS |
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