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CS8952T-CQ Folha de dados(PDF) 8 Page - Cirrus Logic |
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CS8952T-CQ Folha de dados(HTML) 8 Page - Cirrus Logic |
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8 / 86 page  8 DS206TPP2 CS8952T CrystalLAN™ 100BASE-X and 10BASE-T Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK RX_CLK - Receive Clock. Tri-State Output, Pin 36 Continuous clock output used as a reference clock for sampling RXD[3:0], RX_ER, and RX_DV. RX_CLK will have the following nominal frequency: In order to conform with Annex 22B of the IEEE 802.3u specification, the MII_DRV pin should be pulled high during power-up or reset, and the RX_CLK pin should have an external 33 Ω series resistor. For systems not required to drive external connectors and cables as described in the IEEE802.3u specification, the external series resistor may not be necessary. RX_DV/MII_DRV - Receive Data Valid/MII Drive Strength. Input/Tri-State Output, Pin 33. Asserted high to indicate valid data nibbles are present on RXD[3:0]. At power-up or at reset, this pin is used as an input to determine the drive strength of the MII output drivers. When the pin is low, all MII output drivers will be standard 4 mA CMOS drivers. When high, additional drive strength will be added to the MII output drivers. This pin includes a weak internal pull-down (> 20 K Ω), or the value may be set by an external 4.7 KΩ pull-up or pull-down resistor. In order to conform with Annex 22B of the IEEE 802.3u specification, this pin should be pulled high during power-up or reset and should have an external 33 Ω series resistor. For systems not required to drive external connectors and cables as described in the IEEE802.3u specification, it may be possible to reduce overall power consumption by pulling the pin low at power-up or reset, and the external series resistor may not be necessary. RX_EN - Receive Enable. Input, Pin 14. When high, signals RXD[3:0], RX_CLK, RX_DV, and RX_ER are enabled. When low, these signals are tri-stated. RX_EN allows the received data signals of multiple PHY transceivers to share the same MII bus. This pin includes a weak internal pull-up (> 150 K Ω), or the value may be set by an external 10 K Ω pull-up or pull-down resistor. RX_ER/PHYAD4/RXD4 - Receive Error/PHY Address 4/Receive Data 4. Input/Tri-State Output, Pin 37. During normal MII operation, this pin is defined as RX_ER (Receive Error). When RX_DV is high, RX_ER asserted high indicates that an error has been detected in the current receive frame. When RX_DV is low and RXD[3:0] = “1110”, RX_ER high indicates a False Carrier condition. Speed 10BT_SER pin Nominal frequency 100 Mb/s n/a 25 MHz 10 Mb/s low (parallel) 2.5 MHz 10 Mb/s high (serial) 10 MHz |
Nº de peça semelhante - CS8952T-CQ |
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Descrição semelhante - CS8952T-CQ |
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