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BF1205C Folha de dados(PDF) 8 Page - NXP Semiconductors |
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BF1205C Folha de dados(HTML) 8 Page - NXP Semiconductors |
8 / 22 page 9397 750 13005 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 18 May 2004 8 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET VDS(a) =VDS(b) =Vsupply, VG2-S =4V, Tj =25 °C, RG1(b) = 150 kΩ (connected to ground); see Figure 3. (1) VDS(b) =5V. (2) VDS(b) = 4.5 V. (3) VDS(b) =4V. (4) VDS(b) = 3.5 V. (5) VDS(b) =3V. (6) VDS(b) = 2.5 V. VDS(a) =5V; VG1-S(b) = 0 V; gate 1 (a) = open; Tj =25 °C. Fig 8. Drain current of amplifier a as a function of supply voltage of a and b amplifier; typical values. Fig 9. Drain current as a function of gate 2 and drain supply voltage; typical values. Vsupply (V) 05 4 23 1 001aaa558 8 12 4 16 20 ID (mA) 0 001aaa559 VG2-S (V) 06 4 2 16 8 24 32 ID (mA) 0 (1) (2) (3) (4) (5) (6) VDS(a) =VDS(b) =5V; VG1-S(b) =0V; fw = 50 MHz; funw = 60 MHz; Tamb =25 °C; see Figure 33. VDS(a) =VDS(b) =5V; VG1-S(b) = 0 V; f = 50 MHz; see Figure 33. Fig 10. Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values. Fig 11. Gain reduction as a function of AGC voltage; typical values. gain reduction (dB) 050 40 20 30 10 001aaa560 100 90 110 120 Vunw (dB µV) 80 VAGC (V) 04 3 12 001aaa561 30 20 40 10 0 gain reduction (dB) 50 |
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