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TSC2000IPWR Folha de dados(PDF) 2 Page - Texas Instruments |
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TSC2000IPWR Folha de dados(HTML) 2 Page - Texas Instruments |
2 / 38 page 2 www.ti.com TSC2000 SBAS257 ABSOLUTE MAXIMUM RATINGS(1) VDD to GND ........................................................................... –0.3V to +6V Digital Input Voltage to GND ................................... –0.3V to VDD + 0.3V Operating Temperature Range ...................................... –40 °C to +105°C Storage Temperature Range ......................................... –65 °C to +150°C Junction Temperature (TJ Max) .................................................... +150°C TSSOP Package Power Dissipation .................................................... (TJ Max – TA)/θJA θ JA Thermal Impedance .......................................................... 93°C/W Lead Temperature, Soldering Vapor Phase (60s) ............................................................ +215 °C Infrared (15s) ..................................................................... +220 °C NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. INTEGRAL SPECIFIED LINEARITY PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT ERROR (LSB) PACKAGE-LEAD DESIGNATOR(1) RANGE MARKING NUMBER(2) MEDIA, QUANTITY TSC2000IPW ±2 TSSOP-20 PW –40 °C to +85°C TSC2000I TSC2000IPW Rails, 70 "" " " " " TSC2000IPWR Tape and Reel, 2000 NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models labeled with “R” indicates large quantity tape and reel. PIN CONFIGURATION Top View TSSOP PIN DESCRIPTION PIN NAME DESCRIPTION 1VDD Power Supply 2 X+ X+ Position Input 3 Y+ Y+ Position Input 4X– X– Position Input 5Y– Y– Position Input 6 GND Ground 7VBAT1 Battery Monitor Input 1 8VBAT2 Battery Monitor Input 2 9VREF Voltage Reference Input/Output 10 NC No Connection 11 SCLK Serial Clock Input 12 SS Slave Select Input (Active LOW). Data will not be clocked in to MOSI unless SS is LOW. When SS is HIGH, MISO is high impedance. 13 MOSI Serial Data Input. Data is clocked in at SCLK falling edge. 14 DAV Data Available (Active LOW) 15 MISO Serial Data Output. Data is clocked out at SCLK falling edge. High impedance when SS is HIGH. 16 PENIRQ Pen Interrupt 17 AOUT Analog Output Current from D/A Converter 18 ARNG D/A Converter Analog Output Range Set 19 AUX2 Auxiliary A/D Converter Input 2 20 AUX1 Auxiliary A/D Converter Input 1 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper han- dling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. +V DD X+ Y+ X– Y– GND V BAT1 V BAT2 V REF NC AUX1 AUX2 ARNG A OUT PENIRQ MISO DAV MOSI SS SCLK 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 TSC2000 |
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Descrição semelhante - TSC2000IPWR |
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