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MC10EL05DG Folha de dados(PDF) 1 Page - ON Semiconductor |
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MC10EL05DG Folha de dados(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 7 1 Publication Order Number: MC10EL05/D MC10EL05, MC100EL05 5V ECL 2‐Input Differential AND/NAND Description The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E404, the EL05 is ideally suited for those applications which require the ultimate in AC performance. Because a negative 2-input NAND is equivalent to a 2-input OR function, the differential inputs and outputs of the device allows the EL05 to also be used as a 2-input differential OR/NOR gate. The differential inputs employ clamp circuitry so that under open input conditions (pulled down to VEE) the input to the AND gate will be HIGH. In this way, if one set of inputs is open, the gate will remain active to the other input. The 100 Series contains temperature compensation. Features • 275 ps Propagation Delay • ESD Protection: ♦ > 1 kV Human Body Model, ♦ > 100 V Machine Model • PECL Mode Operating Range: ♦ VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: ♦ VCC = 0 V with VEE = −4.2 V to −5.7 V • Internal Input Pulldown Resistors • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity ♦ Level 1 for SOIC−8 ♦ Level 3 for TSSOP−8 ♦ For Additional Information, see Application Note AND8003/D • Flammability Rating: ♦ UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 • Transistor Count = 44 devices • These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 2 3 4 5 6 7 8 D0 D0 D1 D1 VEE Q Q VCC Figure 1. Logic Diagram and Pinout Assignment MARKING DIAGRAMS* H = MC10 K = MC100 4O = MC10 2C = MC100 A = Assembly Location KL05 ALYWG G SOIC−8 D SUFFIX CASE 751−07 1 8 TSSOP−8 DT SUFFIX CASE 948R−02 1 8 1 8 See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION www.onsemi.com KEL05 ALYW G 1 8 HL05 ALYWG G 1 8 HEL05 ALYW G 1 8 L = Wafer Lot Y = Year W = Work Week D = Date Code G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. |
Nº de peça semelhante - MC10EL05DG |
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