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KM416S4030CT-F10 Folha de dados(PDF) 2 Page - Samsung semiconductor

Nome de Peças KM416S4030CT-F10
Descrição Electrónicos  1M x 16Bit x 4 Banks Synchronous DRAM
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Fabricante Electrônico  SAMSUNG [Samsung semiconductor]
Página de início  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416S4030CT-F10 Folha de dados(HTML) 2 Page - Samsung semiconductor

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KM416S4030C
REV. 2 June '98
CMOS SDRAM
Preliminary
The KM416S4030C is 67,108,864 bits synchronous high data
rate Dynamic RAM organized as 4 x 1,048,576 words by 16
bits, fabricated with SAMSUNG
′s high performance CMOS
technology. Synchronous design allows precise cycle control
with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programma-
ble burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system
clock
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (4K cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1M x 16Bit x 4 Banks Synchronous DRAM
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
1M x 16
1M x 16
Column Decoder
Latency & Burst Length
Programming Register
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
1M x 16
1M x 16
Timing Register
ORDERING INFORMATION
Part No.
Max Freq.
Interface Package
KM416S4030CT-G/F7
143MHz
LVTTL
54
TSOP(II)
KM416S4030CT-G/F8
125MHz
KM416S4030CT-G/FH
100MHz
KM416S4030CT-G/FL
100MHz
KM416S4030CT-G/F10
100MHz


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