4/9/03

Page 7 of 10

© 2003 Fairchild Semiconductor Corporation

AC/DC TO LOGIC INTERFACE

OPTOCOUPLER

HCPL-3700

5

6

7

8

3

4

2

1

Z = 50

tr = 5ns

Generator

Pulse

O

Ω

.1uf

bypass

O

(V )

+5V

R

L

Output

PHL

t

PLH

t

5V

2.5V

IN

(V )

Input

(V )

Output

O

1.5 V

90%

AC

DC+

DC-

AC

GND

V

V

O

CC

AC

DC-

DC+

AC

4

3

2

1

Output

O

GND

V

5

6

(V )

R

bypass

.1uf

CC

V

7

8

L

O

V

FF

A

B

+5V

C **

L

* SEE NOTE 8

R *

CC

+

Pulse Gen

CM

V

-

** C IS 30 pF, WHICH INCLUDES PROBE

AND STRAY WIRING CAPACITANCE

L

90%

10%

10%

r

0V

OL

V

Switching Pos. (A)

I

= 0 mA

Switching Pos. (B)

I

= 3.11 mA

V (Max)

V (Min)

O

O

IN

IN

H

O

V

CM

V

L

H

CM

5V

5V

V

Pulse Amplitude = 50 V

Pulse Width = 1 ms

f = 100 Hz

T = T = 1.0

µs (10 - 90%)

IN

rf

Fig. 9. Switching Test Circuit

Fig. 10. Test Circuit for Common Mode Transient Immunity and Typical Waveforms