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AD4000BCPZ-RL7 Folha de dados(PDF) 5 Page - Analog Devices |
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AD4000BCPZ-RL7 Folha de dados(HTML) 5 Page - Analog Devices |
5 / 33 page AD4000 Data Sheet Rev. 0 | Page 4 of 32 Parameter Test Conditions/Comments Min Typ Max Unit −3 dB Input Bandwidth 10 MHz Aperture Delay 1 ns Aperture Jitter 1 ps rms REFERENCE Voltage Range (VREF) 2.4 5.1 V Current 2 MSPS, VREF = 5 V 0.75 mA OVERVOLTAGE CLAMP IIN+/IIN− VREF = 5 V 50 mA VREF = 2.5 V 50 mA VIN+/VIN− at Maximum IIN+/IIN− VREF = 5 V 5.4 V VREF = 2.5 V 3.1 V VIN+/VIN− Clamp On/Off Threshold VREF = 5 V 5.25 5.4 V VREF = 2.5 V 2.68 2.8 V Deactivation Time 360 ns REF Current at Maximum IIN+ VIN+ > VREF 100 µA DIGITAL INPUTS Logic Levels Input Low Voltage, VIL VIO > 2.7 V −0.3 +0.3 × VIO V VIO ≤ 2.7 V −0.3 +0.2 × VIO V Input High Voltage, VIH VIO > 2.7 V 0.7 × VIO VIO + 0.3 V VIO ≤ 2.7 V 0.8 × VIO VIO + 0.3 V Input Low Current, IIL −1 +1 µA Input High Current, IIH −1 +1 µA Input Pin Capacitance 6 pF DIGITAL OUTPUTS Data Format Serial 16 bits, straight binary Pipeline Delay Conversion results available immediately after completed conversion Output Low Voltage, VOL ISINK = 500 µA 0.4 V Output High Voltage, VOH ISOURCE = −500 µA VIO − 0.3 V POWER SUPPLIES VDD 1.71 1.8 1.89 V VIO 1.71 5.5 V Standby Current VDD and VIO = 1.8 V, T = 25°C 1.6 µA Power Dissipation VDD = 1.8 V, VIO = 1.8 V, VREF = 5 V 10 kSPS, high-Z mode disabled 70 µW 1 MSPS, high-Z mode disabled 7 mW 2 MSPS, high-Z mode disabled 14 16 mW 1 MSPS, high-Z mode enabled 8 mW 2 MSPS, high-Z mode enabled 16 19 mW VDD Only 2 MSPS, high-Z mode disabled 9.75 mW REF Only 2 MSPS, high-Z mode disabled 3.75 mW VIO Only 2 MSPS, high-Z mode disabled 0.5 mW Energy per Conversion 7 nJ/sample TEMPERATURE RANGE Specified Performance TMIN to TMAX −40 +125 °C 1 The acquisition phase is the time available for the input sampling capacitors to acquire a new input with the ADC running at a throughput rate of 2 MSPS. 2 A throughput rate of 2 MSPS can only be achieved with turbo mode enabled and a minimum SCK rate of 70 MHz. Refer to Table 4 for the maximum achievable throughput for different modes of operation. 3 Transient response is the time required for the ADC to acquire a full scale input step to ±0.5 LSB accuracy. 4 The minimum and maximum values are guaranteed by characterization, not production tested. 5 See the 1/f noise plot in Figure 18. |
Nº de peça semelhante - AD4000BCPZ-RL7 |
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Descrição semelhante - AD4000BCPZ-RL7 |
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