Si596

Rev. 1.0

7

3. Ordering Information

The Si596 supports a variety of options including frequency, temperature stability, tuning slope, output format, and

VDD. Specific device configurations are programmed into the Si596 at time of shipment. Configurations are

specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part

and for further ordering instructions. The Si596 VCXO series is supplied in an industry-standard, RoHS compliant,

lead-free, 6-pad, 5 x 7 mm package. Tape and reel packaging is an ordering option.

Figure 1. Part Number Convention

R = Tape & Reel

Blank = Trays

Operating Temp Range (°C)

G

–40 to +85 °C

Device Revision Letter

596 Dual VCXO

Product Family

596

X

X

XXXXXX

D

G

R

1

Output Format

A3.3

LVPECL

B

3.3

LVDS

C3.3

CMOS

D3.3

CML

E2.5

LVPECL

F2.5

LVDS

G2.5

CMOS

H2.5

CML

J

1.8

CMOS

K1.8

CML

Note:

CMOS available to 160 MHz.

2

Temperature

Tuning Slope

Minimum APR

Stability

Kv

(±ppm) for VDD @

Code

± ppm (max)

ppm/V (typ)

3.3 V

2.5 V

1.8 V

A

20

380

370

275

200

B

20

185

160

110

80

C

50

185

130

80

50

D

20

125

100

75

40

E

209565

50

25

F

50

125

70

45

10

G

50

95

35

20

N/A

H

204515

N/A

N/A

Notes:

1. For best jitter and phase noise performance, always choose the smallest Kv that meets

the application’s minimum APR requirements. Lower Kv options minimize noise

coupling and jitter in real-world PLL designs. See AN266 for more information.

2. APR is the ability of a VCXO to track a signal over the product lifetime. A VCXO with an

APR of ±100 ppm is able to lock to a clock with a ±100 ppm stability over 15 years over

all operating conditions.

4. Minimum APR values noted above include worst case values for all parameters.

6-digit Frequency Designator Code

Two unique frequencies can be specified within the following

frequency range: 10 to 810 MHz. A six digit code will be assigned for

the specified combination of frequencies. Codes > 000100 refer to

dual XOs programmed with the lower frequency value selected when

FS = 0, and the higher value when FS = 1. Six digit codes < 000100

refer to dual XOs programmed with the higher frequency value

selected when FS = 0, and the lower value when FS = 1.