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AD8138ARMZ-REEL7 Folha de dados(PDF) 8 Page - Analog Devices |
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AD8138ARMZ-REEL7 Folha de dados(HTML) 8 Page - Analog Devices |
8 / 25 page Data Sheet AD8138 Rev. G | Page 7 of 24 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Ratings Supply Voltage ±5.5 V VOCM ±VS Internal Power Dissipation 550 mW Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for the device soldered in a circuit board in still air. Table 6. Package Type θJA Unit 8-Lead SOIC/4-Layer 121 °C/W 8-Lead MSOP/4-Layer 145 °C/W Maximum Power Dissipation The maximum safe power dissipation in the AD8138 packages is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8138. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The load current consists of the differential and common-mode currents flowing to the load, as well as currents flowing through the external feedback networks and internal common-mode feedback loop. The internal resistor tap used in the common-mode feedback loop places a negligible differential load on the output. RMS voltages and currents should be considered when dealing with ac signals. Airflow reduces θJA. In addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the θJA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC (121°C/W) and 8-lead MSOP (θJA = 145°C/W) packages on a JEDEC standard 4-layer board. θJA values are approximations. AMBIENT TEMPERATURE (°C) 1.75 1.50 1.00 1.25 0.50 0.25 0.75 0 SOIC MSOP –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 Figure 3. Maximum Power Dissipation vs. Temperature ESD CAUTION |
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