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SI5341-EVB Folha de dados(PDF) 5 Page - Silicon Laboratories |
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SI5341-EVB Folha de dados(HTML) 5 Page - Silicon Laboratories |
5 / 18 page Si5341-EVB Rev. 1.1 5 6. Clock Input Circuits (INx/INxB and FB_IN/FB_INB) The Si5341-EVB has eight SMA connectors (IN0/IN0B–IN2/IN3B and FB_IN/FB_INB) for receiving external clock signals. All input clocks are terminated as shown in Figure 4 below. Note input clocks are AC coupled and 50 ohm terminated. This represents 4 differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. For details on how to configure inputs as single-ended, please refer to the Si5341 data sheet. Figure 4. Input Clock Termination Circuit 7. Clock Output Circuits (OUTx/OUTxB) Each of the twenty output drivers (10 differential pairs) is AC coupled to its respective SMA connector. The output clock termination circuit is shown in Figure 5 below. The output signal will have no dc bias. If DC coupling is required, the AC coupling capacitors can be replaced with a resistor of appropriate value. The Si5341-EVB provides pads for optional output termination resistors and/or low frequency capacitors. Note that components with schematic “NI” designation are not normally populated on the Si5341-EVB and provide locations on the PCB for optional DC/AC terminations by the end user. Figure 5. Output Clock Termination Circuit |
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