TPA6204A1

SLOS429 − MAY 2004

www.ti.com

9

_

+

VDD

VO+

VO−

GND

6

5

8

7

To Battery

Cs

Bias

Circuitry

IN−

IN+

4

3

2

SHUTDOWN

RI

RI

1

100 k

Ω

40 k

Ω

40 k

Ω

+

−

CI

CI

C(BYPASS)(1)

(1) C(BYPASS) is optional

Figure 16. Differential Input Application Schematic Optimized With Input Capacitors

IN

CI

CI

_

+

VDD

VO+

VO−

GND

6

5

8

7

To Battery

Cs

Bias

Circuitry

IN−

IN+

4

3

2

SHUTDOWN

RI

RI

1

100 k

Ω

40 k

Ω

40 k

Ω

C(BYPASS)(1)

(1) C(BYPASS) is optional

(2) Due to the fully differential design of this amplifier, the

performance is severly degraded if you connect the unused

input to BYPASS when using single-ended inputs.

Figure 17. Single-Ended Input Application Schematic