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AM29SL800DB-100WCI Folha de dados(PDF) 2 Page - Advanced Micro Devices

Nome de Peças AM29SL800DB-100WCI
Descrição Electrónicos  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
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Fabricante Electrônico  AMD [Advanced Micro Devices]
Página de início  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29SL800DB-100WCI Folha de dados(HTML) 2 Page - Advanced Micro Devices

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ADVANCE INFORMATION
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 27546
Rev: A Amendment/+1
Issue Date: March 17, 2003
Refer to AMD’s Website (www.amd.com) for the latest information.
Am29SL800D
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 1.8 Volt-only Super Low Voltage Flash Memory
DISTINCTIVE CHARACTERISTICS
■ Single power supply operation
— 1.65 to 2.2 V for read, program, and erase
operations
— Ideal for battery-powered applications
■ Manufactured on 0.23 µm process technology
— Compatible with 0.32 µm Am29SL800C device
■ High performance
— Access times as fast as 90 ns
■ Ultra low power consumption (typical values at 5
MHz)
— 0.2 µA Automatic Sleep Mode current
— 0.2 µA standby mode current
— 5 mA read current
— 15 mA program/erase current
■ Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to prevent
any program or erase operations within that
sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■ Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
■ Top or bottom boot block configurations
available
■ Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
■ Minimum 1,000,000 erase cycle guarantee per
sector
■ 20-year data retention at 125
°C
■ Package option
— 48-pin TSOP
— 48-ball FBGA
■ Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
■ Data# Polling and toggle bits
— Provides a software method of detecting program
or erase operation completion
■ Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
■ Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data


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