DS963F5

11

CS35L32

3 Characteristics and Specifications

Table 3-7. Signal Monitoring Characteristics

Test conditions, except where noted otherwise: VA = 1.8 V, VP = 3.6 V, VBST = 5.0 V, amp gain = 12 dB, 0.1-

 sense resistor, GNDA = GNDP = 0 V,

and Section 7.7.

Parameters

Min

Typical

Max

Units

General ADC characteristics

—8.5

[1]

ms

VSENSE± monitoring

characteristics (VMON)

Data width

—

16

—

Bits

60

—

2.Parameters given in dB are referred to the applicable typical full-scale voltages. Applies to all THD+N and resolution values in the table

3.VSENSE± THD is measured with the Class D amplifier as the audio source connected to an

8-

sine wave, operating under the typical performance test conditions to produce a large, unclipped audio signal. This setup produces a –3.8-dBFS

VMON output. Larger Class D amplifier amplitudes begin to exhibit clipping behavior, increasing distortion of the signal supplied to VSENSE±

—

–60

—

dB 2

4.CMRR test setup for VSENSE±:

—60—

dB 2

5.VMON group delay is measured from the time a signal is presented on the VSENSE± and pins until the MSB of the digitized signal exits the serial

port. Fs is the LRCK rate.

—7.6/Fs—

s

ISENSE± monitoring

characteristics (IMON)

Data width

—

16

—

Bits

56

—

dB 2

6.For reference, injecting a 125-mVpp fully differential sine wave into the ISENSE± pins (equivalent to a ±0.625 A current with a 0.1-

 ISENSE resistor)

amplifier as the audio source, which is connected to an 8-

typical performance test conditions to produce a large, unclipped audio signal. This setup produces a –29.5-dBFS amplitude IMON output. Larger

Class D amplifier amplitudes begin to exhibit clipping behavior, increasing the distortion of the signal supplied to ISENSE±.

—

–45

—

dB 2

7.

—56—

dB 2

8.IMON group delay is measured from when a signal is presented on the ISENSE± pins until the MSB of the digitized signal exits the serial port. Fs is

the LRCK rate.

—7.6/Fs—

s

VP monitoring characteristics

Data width

—

8

—

Bits

Voltage resolution (See the equation in Section 4.8.4.)

—

35.3

—

mV

(FF code) signal input voltage (VP) 2.89•VA 3.05•VA 3.20•VA

V

VPMON = 1011 0011

VPMON = 1011 0100

…

VPMON = 1111 1111

VPMON = 0000 0000

—

—

…

—

—

2.8

2.835

…

5.482

5.518

—

—

…

—

—

V

V

…

V

V

Table 3-8. Digital Interface Specifications and Characteristics

Parameters

Symbol

Test Conditions

Min

Max

Units

1.Specification includes current through internal pull up/down resistors, where applicable (as defined in Section 1).

2.Leakage current is measured with VA = 1.80 V, VP = 3.60 V, VBST = 3.60 V, and RESET asserted. Each pin is tested while driven high and low.

FLOUT2/AD0

FLEN, FLINH, LRCK

MCLK, SCLK, SDOUT

SCL, SDA, INT, RESET

—

—

—

—

—

—

—

—

±7.5

±4.5

±4.5

±0.1

A

A

A

A

Input capacitance

—

—

10

pF

VA logic I/Os

High-level output voltage

+100

VA–0.2

—

V

Low-level output voltage

—

—

0.20

0.4

V

V

High-level input voltage

—0.70•VA

—

V

Low-level input voltage

—

—

0.30•VA

V

VSENSE+

217 Hz

DC Offset = 0

VSENSE–