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ST2317S23RG Folha de dados(PDF) 1 Page - Stanson Technology |
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ST2317S23RG Folha de dados(HTML) 1 Page - Stanson Technology |
1 / 6 page ST2317S23RG P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com ST2317S23RG 2016 Rev.1 DESCRIPTION ST2317S23RG is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching and low in-line power loss are required in a very small outline surface mount package. PIN CONFIGURATION SOT-23-3L 1.Gate 2.Source 3.Drain PART MARKING SOT-23-3L Y: Year Code W: Week Code FEATURE l -40V/-5.0A, RDS(ON) = 37mΩ (Typ.) @VGS = -10V l -40V/-3.0A, RDS(ON) = 51mΩ @VGS = -4.5V l Super high density cell design for extremely low RDS(ON) l Exceptional on-resistance and maximum DC current capability l SOT-23 package design 3 1 2 D G S 3 1 2 17YW |
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Descrição semelhante - ST2317S23RG |
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