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RT5509 Folha de dados(PDF) 55 Page - Richtek Technology Corporation

Nome de Peças RT5509
Descrição Electrónicos  Speaker Amplifier with Speaker Protection
Download  58 Pages
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Fabricante Electrônico  RICHTEK [Richtek Technology Corporation]
Página de início  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT5509 Folha de dados(HTML) 55 Page - Richtek Technology Corporation

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RT5509
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
DS5509-00
August
2017
www.richtek.com
55
package, the thermal resistance,
JA, is 27C/W on a
standard
JEDEC
51-7
high
effective-thermal-
conductivity four-layer test board. The maximum power
dissipation at TA = 25C can be calculated as below :
PD(MAX) = (125C  25C) / (27C/W) = 3.7W for a
WL-CSP-48B 3.04x2.99 (BSC) package
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX)
and the thermal resistance,
JA. The derating curve in
Figure 23 allows the designer to see the effect of rising
ambient
temperature
on
the
maximum
power
dissipation.
Figure 23. Derating Curve of Maximum Power
Dissipation
Layout Consideration
For best performance of the RT5509, the below PCB
Layout guidelines must be strictly followed.
Place the decoupling capacitors as close as possible to
the DVDD pins. For achieving a good quality.
The traces of VSPOUTP and VSPOUTN should be
kept equal width and length respectively. The Bead + C
should be placed close to chip for better EMI
performance. The power trace of boost inductor is
suggested to place on the external layers for higher
current capability. Please place the inductor as close
as possible to the chip.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB


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