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SN74AUP1G125 Folha de dados(PDF) 4 Page - Texas Instruments

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Nome de Peças SN74AUP1G125
Descrição Electrónicos  Low-Power Single Bus Buffer Gate With 3-State Output
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

SN74AUP1G125 Folha de dados(HTML) 4 Page - Texas Instruments

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SN74AUP1G125
SCES595N – JULY 2004 – REVISED JULY 2017
www.ti.com
Product Folder Links: SN74AUP1G125
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VCC
Supply voltage
–0.5
4.6
V
VI
Input voltage(2)
–0.5
4.6
V
VO
Voltage applied to any output in the high-impedance or power-off state(2)
–0.5
4.6
V
VO
Output voltage in the high or low state(2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
Continuous current through VCC or GND
±50
mA
TJ
Junction temperature
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
1000


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