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SN74AUP1G79DCKT Folha de dados(PDF) 2 Page - Texas Instruments

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Nome de Peças SN74AUP1G79DCKT
Descrição Electrónicos  SN74AUP1G79 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

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SN74AUP1G79
SCES592I – JULY 2004 – REVISED SEPTEMBER 2017
www.ti.com
Product Folder Links: SN74AUP1G79
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 3
6
Specifications......................................................... 4
6.1
Absolute Maximum Ratings ...................................... 4
6.2
ESD Ratings.............................................................. 4
6.3
Recommended Operating Conditions ....................... 5
6.4
Thermal Information .................................................. 5
6.5
Electrical Characteristics: TA = 25°C ........................ 6
6.6
Electrical Characteristics: TA = –40°C to 85°C ......... 7
6.7
Timing Requirements ................................................ 8
6.8
Switching Characteristics: CL = 5 pF ........................ 9
6.9
Switching Characteristics: CL = 10 pF ...................... 9
6.10
Switching Characteristics: CL = 15 pF .................. 10
6.11
Switching Characteristics: CL = 30 pF .................. 11
6.12
Operating Characteristics...................................... 11
6.13
Typical Characteristics .......................................... 12
7
Parameter Measurement Information ................ 13
7.1
Propagation Delays, Setup and Hold Times, and
Pulse Width .............................................................. 13
7.2
Enable and Disable Times ...................................... 14
8
Detailed Description ............................................ 15
8.1
Overview ................................................................. 15
8.2
Functional Block Diagram ....................................... 15
8.3
Feature Description................................................. 15
8.4
Device Functional Modes........................................ 16
9
Applications, Implementation, and Layout ....... 17
9.1
Application Information............................................ 17
9.2
Typical Application .................................................. 17
10
Power Supply Recommendations ..................... 19
11
Layout................................................................... 19
11.1
Layout Guidelines ................................................. 19
11.2
Layout Example .................................................... 19
12
Device and Documentation Support ................. 20
12.1
Documentation Support ........................................ 20
12.2
Receiving Notification of Documentation Updates 20
12.3
Community Resources.......................................... 20
12.4
Trademarks ........................................................... 20
12.5
Electrostatic Discharge Caution ............................ 20
12.6
Glossary ................................................................ 20
13
Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (April 2015) to Revision I
Page
Added DPW (X2SON) package.............................................................................................................................................. 1
Added Maximum junction temperature, TJ in Absolute Maximum Ratings ............................................................................ 4
Changed values in the Thermal Information table to align with JEDEC standards. .............................................................. 5
Added Balanced High-Drive CMOS Push-Pull Outputs, Standard CMOS Inputs, Clamp Diodes, Partial Power Down
(Ioff), Over-voltage Tolerant Inputs ........................................................................................................................................ 15
Added Receiving Notification of Documentation Updates and Community Resources ....................................................... 20
Changes from Revision G (May 2010) to Revision H
Page
Updated document to the new TI data sheet format .............................................................................................................. 1
Removed Ordering Information table .................................................................................................................................... 1
Added Device Information table ............................................................................................................................................ 1
Added Typical Characteristics section.................................................................................................................................. 12


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