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MCZ5303SG Folha de dados(PDF) 7 Page - Shindengen Electric Mfg.Co.Ltd |
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MCZ5303SG Folha de dados(HTML) 7 Page - Shindengen Electric Mfg.Co.Ltd |
7 / 27 page Confidential MCZ5303SG, MCZ5303SH Application Manual Vol. 1.0 CAT.No. 1H0400-1E – 7 – 4 MCZ5303SG * Unless otherwise specified, values such as threshold values are represented in TYP. For details, refer to the characteristic specifications. 4-1. Introduction MCZ5303SG(SOP16) had three control modes depending on the states of the STBY terminal and the ASin terminal. Here, they are defined as follows (with circuit configuration with MCZ5205 and MCZ5207). 1) Normal mode: Performs normal operation (symmetrical control) when the STBY terminal is shorted to GND and the ASin terminal is left opened. 2) Active Standby mode (AS mode) *: Performs continuous asymmetric LLC operation when the STBY and ASin terminal are both shorted to GND. When using MCZ5205, PFC is also forced to stop. 3) Burst mode: Performs burst oscillation control with the STBY terminal open. Accordingly, the mode becomes AS mode and the PFC is also stopped. * The AS mode is an energy-saving mode in our LLC controller MCZ5205/5207. The standby power is further reduced by applying AS mode in addition to burst mode. The SST terminal is a function terminal of MCZ5205 or MCZ5207 that performs soft start and timer protection operation. 4-2. LSin Terminal (pin1) and LSout Terminal (pin2) The LSin terminal is an input terminal of the hysteresis comparator for input main line sensing. It monitors the AC input voltage with voltage divider from AC and turns on/off the KVc1 terminal output according to the voltage. It also outputs the detection result to the LSout terminal. LSin terminal input threshold voltage Operation LSout terminal output 1.05V or more Oscillation start (KVc1 supply start) Hi 0.75V or less Oscillation stop (KVc1 supply stop) Lo KVc1 terminal: Refer to 4-8 KVc1 terminal. Figure 5 is a connection example of the LSin terminal. Input lines are detected by connecting resistances R1 and R2 from the AC line to divide the resistance voltage and smoothing by C1. Figure 5 shows detection with half-wave rectification. Since the C1 capacity can be reduced by connecting diodes from both AC terminals for full-wave rectification, response at a higher speed can be obtained. Voltage VLSin that is generated in LSin at the time of half-wave rectification can be obtained with an approximation of formula 3-1. Capacitor C1 sets the capacity so that the amplitude of the ripple does not exceed the hysteresis width. If the capacitor capacity is unnecessarily large, delay in start and stop becomes longer. In addition, since the operating point is affected when the amplitude of the ripple changes with the capacity of capacitor C1, check and adjust R1 or R2 in actual machine. In the configuration example of Figure 5, settings are made as R1=4M , R2=100k, C1=2.2uF as reference constant examples in the case of 90Vrms to 264Vrms input specification. Actually, R1 should be divided into several pieces and installed in consideration of withstand voltage. When installing parts, place R2 and C1 just proximal to the IC terminal. Voltage VLSin of the LSin terminal for AC input AC (rms) is, ...Formula 4-1 Sensing resistor consumption Rloss is approximately as follows. ...Formula 4-2 Figure 5. Typical line sensing circuit configuration (MCZ5303SG) 〕 〔V 2 1 2 1.72 C(rms) R R R A VLSin 〕 〔W 2 1 3 . 1 C(rms) 2 R R A Rloss |
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