SCL

SDA

ADDR

TLA2021

AIN1

GND

AIN0

VDD

I

Interface

12-Bit

û¯ ADC

Voltage

Reference

Oscillator

Copyright © 2017, Texas Instruments Incorporated

SCL

SDA

ADDR

TLA2022

AIN1

GND

AIN0

VDD

I

Interface

12-Bit

û¯ ADC

Voltage

Reference

Oscillator

Copyright © 2017, Texas Instruments Incorporated

PGA

SCL

SDA

ADDR

TLA2024

I

Interface

12-Bit

û¯ ADC

Voltage

Reference

Oscillator

Copyright © 2017, Texas Instruments Incorporated

PGA

GND

VDD

Mux

AIN1

AIN2

AIN0

AIN3

8

TLA2021, TLA2022, TLA2024

SBAS846 – NOVEMBER 2017

www.ti.com

Product Folder Links: TLA2021 TLA2022 TLA2024

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Copyright © 2017, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The TLA202x are a family of very small, low-power, 12-bit, delta-sigma (ΔΣ) analog-to-digital converters (ADCs).

The TLA202x consist of a ΔΣ ADC core with an internal voltage reference, a clock oscillator, and an I

interface. The TLA2022 and TLA2024 also integrate a programmable gain amplifier (PGA). Figure 5, Figure 6,

and Figure 7 show the functional block diagrams of the TLA2024, TLA2022, and TLA2021, respectively.

converter core consists of a differential, switched-capacitor ΔΣ modulator followed by a digital filter. This

architecture results in a very strong attenuation of any common-mode signals. Input signals are compared to the

internal voltage reference. The digital filter receives a high-speed bitstream from the modulator and outputs a

code proportional to the input voltage.

The TLA202x have two available conversion modes: single-shot and continuous-conversion. In single-shot

conversion mode, the ADC performs one conversion of the input signal upon request, stores the conversion

value to an internal conversion register, and then enters a power-down state. This mode is intended to provide

significant power savings in systems that only require periodic conversions or when there are long idle periods

between conversions. In continuous-conversion mode, the ADC automatically begins a conversion of the input

signal as soon as the previous conversion is complete. The rate of continuous conversion is equal to the

programmed data rate. Data can be read at any time and always reflect the most recently completed conversion.

8.2 Functional Block Diagrams

Figure 5. TLA2024 Block Diagram

Figure 6. TLA2022 Block Diagram

Figure 7. TLA2021 Block Diagram