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ST92F120JV1Q6 Folha de dados(PDF) 10 Page - STMicroelectronics |
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ST92F120JV1Q6 Folha de dados(HTML) 10 Page - STMicroelectronics |
10 / 324 page 10/324 ST92F120 - GENERAL DESCRIPTION In Figure 5 a true open-drain pin schematic is shown. In this case all paths to VDD are removed (P-channel driver, ESD protection diode, internal weak pull-up) in order to allow the system to turn off the power supply of the microcontroller and keep the voltage level at the pin high without in- jecting current in the device. This is a typical con- dition which can occur when several devices inter- face a serial bus: if one device is not involved in the communication, it can be disabled by turning off its power supply to reduce the system current consumption. When an illegal negative voltage level is applied to the ST9 I/O pins (both versions, push-pull and true open-drain output) the clamp diode is always present and active (see ESD protection circuitry and N-channel driver). 1.2.4.4 Internal Circuitry: Analog Input pin Figure 5 shows the internal circuitry used for ana- log input. It is substantially a digital I/O with an added analog multiplexer for the A/D Converter in- put signal selection. The presence of the multiplexer P-channel and N- channel can affect the behaviour of the pin when exposed to illegal voltage conditions. These tran- sistors are controlled by a low noise logic, biased through AVDD and AVSS including P-channel N- well: it is important to always verify the input volt- age value with respect to both analog power sup- ply and digital power supply, in order to avoid un- intended current injections which (if not limited) could destroy the device. Figure 5. Digital Input/Output - Push-Pull Output - Analog Multiplexer Input PIN OUTPUT BUFFER P N P N N INPUT BUFFER P ESD PROTECTION CIRCUITRY PORT CIRCUITRY I/O CIRCUITRY P EN EN P AVDD 9 |
Nº de peça semelhante - ST92F120JV1Q6 |
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Descrição semelhante - ST92F120JV1Q6 |
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