AD7142_17 datasheet(57/70 Pages) AD

Nome de Peças	AD7142

Descrição Electrónicos	Programmable Controller for Capacitance Touch Sensors

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Fabricante Electrônico	AD [Analog Devices]

Página de início	http://www.analog.com

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57 / 70 page

Data Sheet

AD7142

Rev. B | Page 57 of 70

Table 48. STAGEX Detailed Offset Control Description (X = 0 to 11)

Data Bit

Default

Value

Type

Name

Description

[6:0]

X

R/W

NEG_AFE_OFFSET

Negative AFE offset setting (20 pF range)

1 LSB value = 0.16 pF of offset

7

X

R/W

NEG_AFE_OFFSET_SWAP

Negative AFE offset swap control

0 = NEG_AFE_OFFSET applied to CDC negative input

1 = NEG_AFE_OFFSET applied to CDC positive input

[14:8]

X

R/W

POS_AFE_OFFSET

Positive AFE offset setting (20 pF range)

1 LSB value = 0.16 pF of offset

15

X

R/W

POS_AFE_OFFSET_SWAP

Positive AFE offset swap control

0 = POS_AFE_OFFSET applied to CDC positive input

1 = POS_AFE_OFFSET applied to CDC negative input

Table 49. STAGEX Detailed Sensitivity Control Description (X = 0 to 11)

Data Bit

Default

Value

Type

Name

Description

[3:0]

X

R/W

NEG_THRESHOLD_SENSITIVITY

Negative threshold sensitivity control

0000 = 25%, 0001 = 29.73%, 0010 = 34.40%, 0011 = 39.08%

0100 = 43.79%, 0101 = 48.47%, 0110 = 53.15%

0111 = 57.83%, 1000 = 62.51%, 1001 = 67.22%

1010 = 71.90%, 1011 = 76.58%, 1100 = 81.28%

1101 = 85.96%, 1110 = 90.64%, 1111 = 95.32%

[6:4]

X

R/W

NEG_PEAK_DETECT

Negative peak detect setting

000 = 40% level, 001 = 50% level, 010 = 60% level

011 = 70% level, 100 = 80% level, 101 = 90% level

7

X

R/W

Unused

Set unused register bits = 0

[11:8]

X

R/W

POS_THRESHOLD_SENSITIVITY

Positive threshold sensitivity control

0000 = 25%, 0001 = 29.73%, 0010 = 34.40%, 0011 = 39.08%

0100 = 43.79%, 0101 = 48.47%, 0110 = 53.15%

0111 = 57.83%, 1000 = 62.51%, 1001 = 67.22%

1010 = 71.90%, 1011 = 76.58%, 1100 = 81.28%

1101 = 85.96%, 1110 = 90.64%, 1111 = 95.32%

[14:12]

X

R/W

POS_PEAK_DETECT

Positive peak detect setting

000 = 40% level, 001 = 50% level, 010 = 60% level

011 = 70% level, 100 = 80% level, 101 = 90% level

15

X

R/W

Unused

Set unused register bits = 0

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