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ADAV801 Folha de dados(PDF) 44 Page - Analog Devices |
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ADAV801 Folha de dados(HTML) 44 Page - Analog Devices |
44 / 61 page ADAV801 Rev. A | Page 43 of 60 Mute and De-Emphasis—Address 0011110 (0x1E) Table 73. Mute and De-Emphasis Register Bit Map 7 6 5 4 3 2 1 0 Reserved Reserved TxMUTE Reserved Reserved SRC_DEEM1 SRC_DEEM0 Reserved Table 74. Mute and De-Emphasis Register Bit Descriptions Bit Name Description TxMUTE Mutes the AES3/S/PDIF transmitter. 0 = Transmitter is not muted. 1 = Transmitter is muted. SRC_DEEM[1:0] Selects the de-emphasis filter for the input data to the sample rate converter. 00 = No de-emphasis. 01 = 32 kHz de-emphasis. 10 = 44.1 kHz de-emphasis. 11 = 48 kHz de-emphasis. NonAudio Preamble Type—Address 0011111 (0x1F) Table 75. NonAudio Preamble Type Register (Read-Only) Bit Map 7 6 5 4 3 2 1 0 Reserved Reserved Reserved Reserved DTS-CD Preamble NonAudio Frame NonAudio Subframe_A NonAudio Subframe_B Table 76. NonAudio Preamble Type Register (Read-Only) Bit Descriptions Bit Name Description DTS-CD Preamble This bit is set if the DTS-CD preamble is detected. NonAudio Frame This bit is set if the data received through the AES3/S/PDIF receiver is nonaudio data according to the IEC61937 standard or nonaudio data according to SMPTE337M. NonAudio Subframe_A This bit is set if the data received through Channel A of the AES3/S/PDIF receiver is subframe nonaudio data according to SMPTE337M. NonAudio Subframe_B This bit is set if the data received through Channel B of the AES3/S/PDIF receiver is subframe nonaudio data according to SMPTE337M. Receiver Channel Status Buffer—Address 0100000 to Address 0110111 (0x20 to 0x37) Table 77. Receiver Channel Status Buffer Register Bit Map 7 6 5 4 3 2 1 0 RCSB7 RCSB6 RCSB5 RCSB4 RCSB3 RCSB2 RCSB1 RCSB0 Table 78. Receiver Channel Status Buffer Register Bit Descriptions Bit Name Description RCSB[7:0] The 24-byte receiver channel status buffer. The PRO bit is stored at address location 0x20, Bit 0. This buffer is read- only if the channel status is not autobuffered between the receiver and transmitter. Transmitter Channel Status Buffer—Address 0111000 to Address 1001111 (0x38 to 0x4F) Table 79. Transmitter Channel Status Buffer Register Bit Map 7 6 5 4 3 2 1 0 TCSB7 TCSB6 TCSB5 TCSB4 TCSB3 TCSB2 TCSB1 TCSB0 Table 80. Transmitter Channel Status Buffer Register Bit Descriptions Bit Name Description TCSB[7:0] The 24-byte transmitter channel status buffer. The PRO bit is stored at address location 0x38, Bit 0. This buffer is disabled when autobuffering between the receiver and transmitter is enabled. |
Nº de peça semelhante - ADAV801_17 |
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Descrição semelhante - ADAV801_17 |
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