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MT9M131 Folha de dados(PDF) 38 Page - ON Semiconductor |
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MT9M131 Folha de dados(HTML) 38 Page - ON Semiconductor |
38 / 50 page MT9M131 www.onsemi.com 38 The IFP typically generates up to 16 bits per pixel, for example YCbCr or 565RGB, but has only an 8-bit port through which to communicate this pixel data. There is no phase locked loop (PLL), so the primary input clock (EXTCLK) must be twice the fundamental pixel rate (defined by the sensor pixel clock). To generate SXGA images at 15 fps, the sensor core requires a clock in the 24 to 27 MHz range; this is also the fundamental pixel clock rate (sensor pixel clock) for full-power operation. To achieve this pixel rate, EXTCLK must be in the 48 to 54 MHz range. The device defaults assume a 54 MHz clock. Minimum clock frequency is 2 MHz. Primary Operating Modes The MT9M131 supports two primary modes of operation with respect to the sensor core that affect pixel rate, frame rate, and blanking. Full-Power Readout Mode The sensor is in full resolution mode, generating 1.3 megapixels (SXGA = 1,280 × 1,024 + border) for interpolation. The SXGA image fed from the sensor to the colorpipe can be resized in the colorpipe, but the frame rate is still defined by sensor core operation. In full-power readout mode, with full FOV, the frame rate is invariant with the final image size: Context Typically Context B Sensor Read Mode Settings No Skipping Full-power Readout, that is, Full Data Rate Sensor Pixel Clock 27 MHz for 54 MHz Master Clock: Maximum Pixel Rate of 27 Megapixels per Second Maximum Frame Rate For 54 MHz Master Clock, 15 fps Low-Power Readout Mode Running under low-power readout, the sensor is in skip mode, and generates QSXGA frames (640 × 512 + border = 336,960 pixels). This full FOV QSXGA image can be resized, but only to resolutions smaller than QSXGA. The frame rate is defined by the operating mode of the sensor: Context Typically Context A Sensor Read Mode Settings Row Skip 2 × Column Skip 2 × Low-power Readout Maximum Data Rate is Half that of Full-power Readout Sensor Pixel Clock 13.5 MHz for 54 MHz Master Clock: Maximum Pixel Rate of 13.5 Megapixels per Second Maximum Frame Rate For 54 MHz Master Clock, 30 fps Tuning Frame Rates Actual frame rates can be tuned by adjusting various sensor parameters. The sensor registers are in page 0, thus the “0” at the beginning of each register address: Table 14. REGISTER ADDRESS FUNCTIONS Register Function R0x004 Window width, typically 1280 in the MT9M131 R0x003 Window height, typically 1024 in the MT9M131 LOW-POWER READOUT MODE − CONTEXT A R0x007 Horizontal blanking, default is 190 (units of sensor pixel clocks) R0x008 Vertical blanking, default is 17 (rows including black rows) FULL-POWER READOUT MODE − CONTEXT B R0x005 Horizontal blanking, default is 388 (units of sensor pixel clocks) R0x006 Vertical blanking, default is 42 (rows including black rows) In the MT9M131, the sensor core adds 4 border pixels all the way around the image, taking the active image size to 1288 × 1032 in full-power snapshot resolution, and 648 × 520 when skipping rows in low-power preview resolution. This is achieved through the default settings: • Read mode context B: R0x020 • Oversize and show border bits are set by default • Oversize and show border bits are not context switchable, thus their location only in read mode context B Default Blanking Calculations The MT9M131 default blanking calculations are a function of context, as follows: [REG<a> | REG<b>]: • Reg<a> Low-power readout = context A, typically used for viewfinder • Reg<b> Full power readout = context B, typically used for snapshots |
Nº de peça semelhante - MT9M131_17 |
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