MT9V023_17 datasheet(33/43 Pages) ONSEMI

Nome de Peças	MT9V023

Descrição Electrónicos	1/3-Inch Wide?륷GA CMOS Digital Image Sensor

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MT9V023

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33

LVDS Data Bus Timing

The LVDS bus timing waveforms and timing

specifications are shown in Table 14 and Figure 35.

Figure 35. LVDS Timing

Data Rise/Fall Time

(10% − 90%)

Data Setup Time Data Hold Time

LVDS Data Output

LVDS Clock Output

(Shft_CLKOUT_N/P)

(SER_DATAOUT_N/P)

Clock Rise/Fall Time

(10% − 90%)

Clock Jitter

Table 14. LVDS AC TIMING SPECIFICATIONS

(VPWR = 3.3 V ±0.3 V; TJ = – 40°C to +105°C; output load = 100 Ω; frequency 27 MHz)

Parameter

Minimum

Typical

Maximum

Unit

LVDS clock rise time

–

0.22

0.30

ns

LVDS clock fall time

–

0.22

0.30

ns

LVDS data rise time

–

0.28

0.30

ns

LVDS data fall time

–

0.28

0.30

ns

LVDS data setup time

0.3

0.67

–

ns

LVDS data hold time

0.1

1.34

–

ns

LVDS clock jitter

–

92

ps

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